1) Base of hexadecimal number system? Answer : 16 2) Universal gate in digital logic? Answer : NAND 3) Memory type that is non-volatile? Answer : ROM 4) Basic building block of digital circuits? Answer : Gate 5) Device used for data storage in sequential circuits? Answer : Flip-flop 6) Architecture with shared memory for instructions and data? Answer : von Neumann 7) The smallest unit of data in computing? Answer : Bit 8) Unit that performs arithmetic operations in a CPU? Answer : ALU 9) Memory faster than main memory but smaller in size? Answer : Cache 10) System cycle that includes fetch, decode, and execute? Answer : Instruction 11) Type of circuit where output depends on present input only? Answer : Combinational 12) The binary equivalent of decimal 10? Answer : 1010 13) Memory used for high-speed temporary storage in a CPU? Answer : Register 14) Method of representing negative numbers in binary? Answer : Two's complement 15) Gate that inverts its input signal? Answer : NOT 16)...
Allocation of Frames
We said earlier that there were two important tasks in virtual memory management a page-replacement method and a frame-allocation method. This section refuge the second part of that pair.
Minimum Number of Frames
* The absolute least number of frames that a process must be assigned is dependent on system architecture, and corresponds to the worst-case scenario of the number of pages that could be touched by a single ( machine) instruction.
* If an instruction (and its operands)cross a page boundary, then multiple pages could be required just for the instruction fetch.
* Memory references in an directive touch more pages, and if those memory locations can span page boundaries, then many pages could be required for operand access also.
* The worst case implies indirect addressing, particularly where many levels of indirect addressing are allowed. Left not checked, a pointer to a pointer to a pointer to a pointer to a . . . could apparently touch each page in the virtual address space in a single machine
instruction, requiring each virtual page be loaded into physical memory concurrently. For this reason architectures place a limit ( say 16 ) on the number of levels of indirection permitted in an instruction, which is enforced with a counter initialized to the limit and decreased with every level of indirection in an instruction - If the counter extends zero, then an "excessive indirection" trap occurs. This example would still require a least frame allocation of 17 per process.
Allocation Algorithms
* Equal Allocation - If there are m frames available and n processes to share them, each process gets m / n frames, and the remaining are kept in a free-frame buffer pool.
* Proportional Allocation - Allocate the frames relatively to the size of the process, relative to the total size of all processes. So if the size of process i is S_i, and S is the sum of all S_i, then the assignment for process P_i is a_i = m * S_i / S.
* Differences on proportional allocation could consider priority of process rather than just their size.
* Obviously all assigneds vary over time as the number of available free frames, m, fluctuates, and all are also subject to the constraints of minimum allocation.(If the minimum allocations cannot be met, then processes must either be interchanged out or not allowed to start until more free frames become available)
Global versus Local Allocation
* One big question is whether frame allocation ( page replacement ) happens on a local or global level.
* With local replacement, the number of pages issued to a process is fixed, and page replacement occurs only amongst the pages assigned to this process.
* With global replacement, any page may be a potential victim, whether it presently
belongs to the process looking for a free frame or not.
* Local page replacement enters processes to better control their own page fault rates, and leads to more consistent performance of a given process over different system load levels.
* Global page replacement is overall more structured, and is the more commonly used approach.
Non-Uniform Memory Access
* The above arguments all assume that all memory is equal, or at least has equal access times.
* This may not be the case in multiple-processor systems, especially where each CPU is physically placed on a separate circuit board which also holds some portion of the overall system memory.
* In these latter systems, CPUs can retrieve memory that is physically located on the same board much faster than the memory on the other boards.
* The basic solution is akin to processor affinity - At the same time that we try to structure processes on the same CPU to decrease cache misses, we also try to assign memory for those processes on the same boards, to decrease access times.
* The presence of threads confuses the picture, especially when the threads get loaded onto different processors.
* Solaris uses an lgroup as a solution, in a hierarchical fashion depend on relative latency. For example, all processors and RAM on a single board would probably be in the same lgroup. Memory assignments are made within the same group if possible, or to the next nearest lgroup otherwise. ( Where "nearest" is defined as having the least access time. )